Verification Engineer involved in functional verification and emulation of NMAX Neural
Inference SoC and EFLX (embedded FPGA) cores in different 40nm, 28nm, 16nm process.
-Responsible for all aspects of verification and emulation including:
oSetup of industry standard Verification IP flow
oDevelopment of verification testbench for NMAX SoC including NMAX IP, LDDR4 memory controller, PCIe controller
oDevelopment of verification testbench for silicon validation
oEmulation of NMAX SoC and or NMAX IP using industry standard emulation tool
oWork with device driver software team
EXPERIENCE ANDSKILL REQUIRED
BSEE/MSEE with at least 2 years of relevant industry experience
Must be very smart and very motivated
Must have hands-on experience in VIP development, setup of verification tools and methodology such as UVM/OVM and in developing verification plan for SoC or ASIC architecture
Must have hands-on functional coverage analysis and assertion implementation
Must have hands-on experience with standard functional simulators such as NCSIM or Questa
Preferred experience OR willing to quickly learn:
-Emulation flow development in Cadence Palladium or equivalent emulation hardware
-Device driver development and interaction of verification platform with device drivers
-DFT/ATPG for NMAX SoC
Must be passionate about being part of an aggressive, venture-backed startup team that is changing chip architecture. Must be entrepreneurial, innovative problem solver and willing to work hard.
MUST live in Silicon Valley and have US citizenship or permanent residency (“green card”), or holding a current H1-B visa
Send your resumes and contact info: only apply if you are highly qualified, very smart, super-motivated and willing to work hard!