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Hardware Package Design Engineer at Flex Logix
Mountain View, CA, US

Package Design Engineer involved in package development for the NMAX Neural Inference SoC and eFPGA Validation Chip Package

-Responsible for all aspects of package development including:
oDesign and layout of package
oSI/PI analysis of package
oPDN analysis
oFrequency domain and time domain analysis
oModeling of high-speed IO parameters
oBGA/PCB breakout optimization
oUse of package passive components
oTest and Qual requirements
oCost Performance optimization


Must have hand on experience in designing a SoC, ASIC or COT package  which included complex IP such as High Speed Serial Links, LPDDR/DDR Memory Links, CPU or GPU in a finfet process nodes and which is shipping in high volume

Must have experience in interacting with different package vendors and a good understanding of impact of package design and cost optimization.

BSEE/MSEE with 5 years of relevant industry experience

Must be very smart and very motivated

Must be a hands-on technical lead and self-starter for all aspects of SoC Package

Preferred experience OR willing to quickly learn:

-PCB design
-SI/PI analysis of Memory and high speed SERDES channels
-JEDEC requirements for qualification of High Performance Packages including ESD, HTOL and others
-Radiation effects on Package

Must be passionate about being part of an aggressive, venture-backed startup team that is changing chip architecture.  Must be entrepreneurial, innovative problem solver and willing to work hard.

MUST live in Silicon Valley and have US citizenship or permanent residency (“green card”), or holding a current H1-B visa